fpga-signaltap SKILL.md skillA
fpga-signaltap from vibeic/vibe-ic is an agent skill: a SKILL.md folder an AI agent loads when a task calls for it.
mdr add vibeic/vibe-ic/fpga-signaltap@git:20260803.26669faPins git:20260803.26669fa in mdr.lock. Pin the fingerprint instead.
- Audit grade
- A, 17 of 17 checks passed
- Kind
- SKILL.md skill
- Repository
- vibeic/vibe-ic
- Path
vibe-ic-marketplace/plugins/vibe-ic/skills/fpga-signaltap/SKILL.md- Versions recorded
- 2
- Latest version
- git:20260803.26669fa, committed Aug 3, 2026
- First version recorded
- Jun 13, 2026
- Size
- 9,246 bytes
- Repository stars
- 32
- License
- Apache-2.0
Auto-generate Quartus SignalTap II logic analyzer configurations for FPGA debugging. When to use: FPGA BIST fails and UART log isn't enough to diagnose the root cause. Generates .stp file that captures all DUT I/O signals, internal FSM state, and BIST engine state with configurable triggers. Triggers when: 'signaltap', 'debug FPGA', 'capture signals', 'logic analyzer', 'BIST failed need debug', or when Phase 3 FPGA verification fails and more visibility is needed.
Collected from public GitHub. Every version is saved exactly as it was and never changes. Install it at an exact version with the mdr tool, and every file is checked before it reaches your agent. The main file is checked against the SHA-256 fingerprint recorded here, and the others against the fingerprints GitHub keeps for its source commit. The automatic checks below grade the latest version, and the same checks always give the same file the same grade.
What the file says
# SignalTap II Auto-Generator
Auto-generate Quartus SignalTap II logic analyzer configurations for post-synthesis FPGA debugging.
## When to Use
1. FPGA BIST reports FAIL but UART log doesn't show the root cause
2. Need to capture internal signal transitions at speed
3. Debugging timing-dependent issues that simulation doesn't reproduce
4. Verifying that actual DUT behavior matches expected waveforms
## Requirements
- **Quartus 23.1+** (SignalTap II is included in all editions)
- **DE10-Nano** target board (or any Intel/Altera FPGA with JTAG)
- **USB-Blaster** JTAG cable for signal capture
## Tool: .stp generation (deterministic — MCP tool, not prose)
The `.stp` is generated deterministically by the MCP tool
**`eda_rtl_signaltap_autogen`** — it scans the RTL for the DUT port list +
timing-critical signals and emits the Quartus SignalTap XML (`.stp`) or Vivado
ILA `.tcl`. Defaults: `clock_signal=CLOCK_50`, `depth=2048`, trigger on the
BIST fail event. Pass `extra_signals=[...]` to add anything the heuristic misses.
```text
eda_rtl_signaltap_autogen(rtl_dir=..., top_module=..., target="quartus",
clock_signal="CLOCK_50", depth=2048)
…Read the whole file at its exact version.
How to install
mdr add vibeic/vibe-ic/fpga-signaltap@sha256:085a0d7919f6381bThe line at the top of this page pins the label git:20260803.26669fa, which is what most people want. This one pins the sha256 fingerprint of the contents instead, so it survives a label being moved. Either way the exact version is written to mdr.lock, and mdr install downloads and checks those contents again, so it installs them exactly or stops with an error.
[](https://markdownregistry.com/a/art_a7tqaru7e2g5evll)
3 badge image fetches in 30 days. What the badge shows.
Versions
The registry has recorded 2 versions of this file, between Jun 13, 2026 and Aug 3, 2026, about one every 51 days.
| version | committed | commit | size | audit | |
|---|---|---|---|---|---|
| git:20260803.26669fa latest | 2026-08-03 | 26669fa | 9,246 B | A | view · diff |
| git:20260613.86cacb4 | 2026-06-13 | 86cacb4 | 6,785 B | A | view |
Audit of the latest version
- pass: Frontmatter block present
- pass: Frontmatter declares a name
- pass: Frontmatter declares a description
- pass: Size between 200 bytes and 200 KB (9246 bytes)
- pass: No zero-width or bidi control characters
- pass: No instruction hidden inside an HTML comment
- pass: No link to an exfiltration or paste host
- pass: No credential-shaped string
- pass: No instruction to send local credentials anywhere
- pass: No text hidden with inline styles
- pass: No prompt-injection phrasing
- pass: No curl or wget piped into a shell
- pass: No recursive delete of root, home or parent
- pass: No instruction to read or print local credentials
- pass: No base64 blob over 200 characters
- pass: No link to a raw IP address
- pass: No script tag
Source
vibeic/vibe-ic · 32 stars · license Apache-2.0 · pushed 2026-11-08 · branch main
API
GET https://markdownregistry.com/api/v1/artifacts/art_a7tqaru7e2g5evll GET https://markdownregistry.com/api/v1/resolve?ref=vibeic/vibe-ic/fpga-signaltap GET https://markdownregistry.com/api/v1/blob/085a0d7919f6381be1d3f38fb1ffbbfa88d153f4322f7fb529b2bb424178f004
Your AI assistant does the legwork. You hear about the deals worth your word. Hand yours the standing instructions at modelranch.com and it joins the network that reads files like this one.
Guides: the SKILL.md format and its required fields · what to check before you install a skill · how to pin a skill to an exact version · where to find agent skills · keeping a team on the same skills · which agent file does what.